IMPORTANT QUES FOR DE

CHAPTER 2 : LOGIC GATES & IC LOGIC FAMILY

Prepare all gates with symbol & Truth table.


1. Explain : NAND gate as universal gate.

2. Explain : OR gate as universal gate.

3. Explain : NAND gate using RTL logic.

4. EXPLAIN : NAND gate using Totem pole output.

5. Explain : NAND gate using open collector TTL logic.

6. Explain : NAND gate using DTL logic.

7. Explain : NAND gate using CMOS logic.

8. Explain : characteristics of logic families.

9. Explain : NAND gate using NMOS logic.

10. Explain : NAND gate using PMOS logic.


CHAPTER 4 : COMBINATIONAL LOGIC CIRCUITS


1. Explain : Half Adder & Full adder.

2. Explain : Full subtractor.

3. Explain : 2’s complement subtractor.
4. Explain : 3 to 8 Multiplexer.

6. Explain : BCD adder.

7. Explain : Parity generator.

8. Explain : Binary to gray converter.

9. Explain : Gray to binary converter.

10. Explain : 8 to 3 Encoder.

-------
For updates please visit my website : http://www.diplomace.co.cc/
-------